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19-4353; Rev 0; 11/08
KIT ATION EVALU BLE AVAILA
Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
General Description
The MAX17075 includes a high-voltage boost regulator, one high-current operational amplifier, two regulated charge pumps, and one MLG block for gate-driver supply modulation. The step-up DC-DC converter is a 1.2MHz currentmode boost regulator with a built-in power MOSFET. It provides fast load-transient response to pulsed loads while producing efficiencies over 85%. The built-in 160m (typ) power MOSFET allows output voltages as high as 18V boosted from inputs ranging from 2.5V to 5.5V. A built-in 7-bit digital soft-start function controls startup inrush currents. The gate-on and gate-off charge pumps provide regulated TFT gate-on and gate-off supplies. Both output voltages can be adjusted with external resistive voltage-dividers. The operational amplifier, typically used to drive the LCD backplane (VCOM), features high-output short-circuit current (500mA), fast slew-rate (45V/s), wide bandwidth (20MHz), and rail-to-rail outputs. The MAX17075 is available in a 24-pin thin QFN package with 0.5mm lead spacing. The package is a square (4mm x 4mm) with a maximum thickness of 0.8mm for ultra-thin LCD design. It operates over the -40C to +85C temperature range.
Features
o 2.5V to 5.5V Input Operating Range o Current Mode Step-Up Regulator Fast-Transient Response Built-In 20V, 3A, 0.16 n-Channel Power MOSFET Cycle-by-Cycle Current Limit 87% Efficiency (5V Input to 13V Output) 1.2MHz Switching Frequency 1% Output Voltage Regulation Accuracy o High-Current 18V VCOM Buffer 500mA Output Short-Circuit Current 45V/s Slew Rate 20MHz -3dB Bandwidth Rail-to-Rail Output o Regulated Charge Pump for TFT Gate-On Supply o Regulated Charge Pump for TFT Gate-Off Supply o Logic-Controlled High-Voltage Switches with Adjustable Delay o Soft-Start and Timed Delay Fault Latch for All Outputs o Overload and Thermal Protection
MAX17075
Simplified Operating Circuit
VIN 2.5V TO 5.5V R1 10 C5 1F TO VCOM OUT VAVDD VCC LX PGND FB COMP FROM SYSTEM 3.3V VIN VMAIN
Applications
Notebook Computer Displays LCD Monitor Panels LCD TVs
Ordering Information
PART TEMP RANGE PIN-PACKAGE MAX17075ETG+ -40C to +85C 24 TQFN-EP* *EP = Exposed paddle. +Denotes a lead-free/RoHS-compliant package.
BGND NEG POS REF
MAX17075
RST RSTIN DRN COM AGND FBN DRVP SRC VGON
VGOFF
DRVN
BGND SUP CTL EP
FBP DEL
Pin Configuration appears at end of data sheet.
FROM TCON
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
ABSOLUTE MAXIMUM RATINGS
VCC, CTL, RSTIN, RST to AGND ..........................-0.3V to +7.5V DEL, REF, COMP, FB, FBN, FBP to AGND .......................................-0.3V to (VVCC + 0.3V) PGND, BGND to AGND.........................................-0.3V to +0.3V LX to PGND ............................................................-0.3V to +20V SUP to PGND .........................................................-0.3V to +20V DRVN, DRVP to PGND..............................-0.3V to (VSUP + 0.3V) SRC, COM, DRN to AGND .....................................-0.3V to +36V DRN to COM............................................................-30V to +30V SRC to SUP ............................................................................23V REF Short Circuit to AGND.........................................Continuous POS, NEG, OUT to AGND...........................-0.3V to (VSUP + 0.3) DRVN, DRVP RMS Current ...............................................200mA LX, PGND RMS Current Rating.............................................2.4A Continuous Power Dissipation (TA = +70C) 24-Pin TQFN (derate 27.8mW/C above +70C).......2222mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VVCC = +5V, Circuit of Figure 1, VAVDD = VSUP = +13V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER VCC Input Supply Range VCC Undervoltage-Lockout (UVLO) Threshold VCC Shutdown Current VCC Quiescent Current REFERENCE REF Output Voltage REF Load Regulation REF Sink Current REF Undervoltage-Lockout Threshold OSCILLATOR AND TIMING Frequency Oscillator Maximum Duty Cycle Duration to Trigger Fault Condition DEL Capacitor Charge Current DEL Turn-On Threshold DEL Discharge Switch On-Resistance STEP-UP REGULATOR Output Voltage Range FB Regulation Voltage FB Fault Trip Level FB Load Regulation FB Line Regulation FB Input Bias Current FB Transconductance FB Voltage Gain FB = COMP, CCOMP = 1nF Falling edge 0 < ILOAD < full, transient only VCC = 2.5V to 5.5V VFB = 1.25V I = 2.5A at COMP, FB = COMP FB to COMP -0.2 50 75 VVCC 1.238 0.96 1.250 1 -1 0 125 160 2600 +0.2 200 280 18 1.262 1.04 V V V % %/V nA S V/V FB or FBP or FBN below threshold During startup, VDEL = 1.0V 1000 87 47 4 1.19 1200 90 55 5 1.25 20 1400 93 65 6 1.31 kHz % ms A V No external load 0n < ILOAD < 50A In regulation Rising edge, hysteresis (typ) = 200mV 1.238 10 1 1.17 1.250 1.262 6 V mV A V VCC rising, hysteresis (typ) = 50mV VCC = 2V VFB = 1.3V, not switching VFB = 1.0V, switching CONDITIONS MIN 2.5 2.05 2.25 100 1 4 TYP MAX 5.5 2.45 200 1.5 5 UNITS V V A mA
2
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
ELECTRICAL CHARACTERISTICS (continued)
(VVCC = +5V, Circuit of Figure 1, VAVDD = VSUP = +13V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER LX Current Limit LX On-Resistance LX Leakage Current Current-Sense Transresistance Soft-Start Period POSITIVE CHARGE-PUMP REGULATOR VSUP Input Supply Range VSUP Overvoltage Threshold Operating Frequency FBP Regulation Voltage FBP Line Regulation Error FBP Input Bias Current DRVP Current Limit DRVP PCH On-Resistance DRVP NCH On-Resistance FBP Fault Trip Level Positive Charge-Pump Soft-Start Period NEGATIVE CHARGE-PUMP REGULATOR VSUP Input Supply Range Operating Frequency FBN Regulation Voltage (VREF - VFBN) FBN Input Bias Current FBN Line Regulation Error DRVN PCH On-Resistance DRVN NCH On-Resistance DRVN Current Limit FBN Fault Trip level Negative Charge-Pump Soft-Start Period Not in dropout Rising edge 7-bit voltage ramp with filtering to prevent high peak currents VREF - VFBN = 1V VFBN = 0, TA = +25C VSUP = 9V to 18V, VGOFF = -7V 4 1.5 400 450 3 5 -1.5% -50 6 0.5 x f OSC 1 +1.5% +50 0.2 6 3 mA mV ms 18 V Hz V nA %/V Falling edge 7-bit voltage ramp with filtering to prevent high peak currents 0.96 VSUP = 12V to 18V, VGON = 30V VFBP = 1.5V, TA = +25C Not in dropout -50 400 4 1.5 1 3 6 3 1.04 5 V ms -1.5% VSUP = rising, hysteresis = 200mV 6 19 20 0.5 x f OSC 1.250 +1.5% 0.2 +50 18 21 V V Hz V %/V nA mA 7-bit current ramp ILX = 200mA VLX = 19V, TA = +25C 0.1 CONDITIONS VFB = 1.1V, duty cycle = 75% MIN 2.5 TYP 3.0 0.16 10 0.2 14 MAX 3.5 0.25 20 0.3 A V/A ms UNITS A
MAX17075
POSITIVE GATE DRIVER TIMING AND CONTROL SWITCHES CTL Input Low Voltage CTL Input High Voltage CTL Input Current CTL-to-COM Rising Propagation Delay SRC Input Voltage Range SRC-to-COM Switch On-Resistance VDEL = 1.5V, CTL = VCC 5 VCTL = 0 or VVCC, TA = +25C CLOAD = 100pF 2 -1 250 36 10 +1 0.6 V V A ns V
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
ELECTRICAL CHARACTERISTICS (continued)
(VVCC = +5V, Circuit of Figure 1, VAVDD = VSUP = +13V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER DRN-to-COM Switch On-Resistance COM-to-GND Pulldown SRC Input Current OPERATIONAL AMPLIFIERS SUP Supply Range VSUP Undervoltage Threshold SUP Supply Current Input Offset Voltage Input Bias Current Input Common-Mode Voltage Range Input Common-Mode Rejection Ratio Output-Voltage-Swing High Output-Voltage-Swing Low Large-Signal Voltage Gain Slew Rate -3dB Bandwidth Short-Circuit Current XAO CONTROL RSTIN Threshold RSTIN Input Current RSTIN Hysteresis RST Output Voltage RST Blanking Time XAO UVLO I SINK = 1mA Counting from VVCC crossing 2.25V VVCC rising with hysteresis of 50mV 160 220 1.5 Falling edge at VCC = 5V Falling edge at VCC = 1.8V TA = +25C 1.225 1.213 -1 50 0.4 280 1.7 1.250 1.250 1.275 1.287 +1 V A mV V ms V Sourcing Sinking 500 500 IOUT = 50mA I OUT = -50mA VOUT = 1V to (VSUP - 1)V 80 45 20 VSUP 350 350 Buffer configuration, VPOS = VSUP/2, no load VNEG, V POS = V SUP/2, TA = +25C VNEG, V POS = V SUP/2, TA = +25C -1 0 80 6 3.8 4 4 18 4.2 6.5 12 +1 VSUP V V mA mV A V dB mV mV dB V/s MHz mA VDEL = 0 VDEL = 1.5V, CTL = VCC VDEL = 1.5V, CTL = AGND CONDITIONS VDEL = 1.5V, CTL = AGND MIN TYP 30 1.5 300 200 MAX 60 2.5 600 360 k A UNITS
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
ELECTRICAL CHARACTERISTICS
(VCC = +5V, Circuit of Figure 1, VAVDD = VSUP = +13V, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER VCC Input Supply Range VCC Undervoltage-Lockout Threshold VCC Shutdown Current VCC Quiescent Current REFERENCE REF Output Voltage REF Load Regulation REF Sink Current REF Undervoltage-Lockout Threshold OSCILLATOR AND TIMING Frequency Oscillator Maximum Duty Cycle Duration to Trigger Fault Condition DEL Capacitor Charge Current DEL Turn-On Threshold STEP-UP REGULATOR Output Voltage Range FB Regulation Voltage FB Fault Trip Level FB Line Regulation FB Input Bias Current FB Transconductance LX Current Limit LX On-Resistance Current-Sense Transresistance POSITIVE CHARGE-PUMP REGULATOR VSUP Input Supply Range VSUP Overvoltage Threshold FBP Regulation Voltage FBP Line Regulation Error FBP Input Bias Current DRVP PCH On-Resistance DRVP NCH On-Resistance FBP Fault Trip Level Positive Charge-Pump Soft-Start Period VSUP = rising, hysteresis = 200mV VSUP = 8V to 18V, VGON = 30V VFBP = 1.5V, TA = +25C 6 19 -2% -50 1.25 18 21 +2% 0.2 +50 6 3 1.04 5 V V V %/V nA FB = COMP, CCOMP = 1nF Falling edge VCC = 2.5V to 5.5V VFB = 1.25V I = 2.5A at COMP, FB = COMP VFB = 1.1V, duty cycle = 75% ILX = 200mA 0.10 VIN 1.230 0.96 -0.25 50 75 2.5 18 1.267 1.04 +0.25 200 280 3.5 0.25 0.30 V/A V V V %/V nA S A FB or FBP or FBN below threshold During startup, VDEL = 1.0V 1000 86 47 4 1.19 1400 94 65 6 1.31 kHz % ms A V No external load 0 < ILOAD < 50A In regulation Rising edge, hysteresis (typ) = 200mV 1.230 10 1.15 1.267 6 V mV A V VFB = 1.3V, not switching VFB = 1.0V, switching VCC rising, hysteresis (typ) = 50mV CONDITIONS MIN 2.5 2.05 TYP MAX 5.5 2.45 200 1.5 5 UNITS V V A mA
MAX17075
Falling edge 7-bit voltage ramp with filtering to prevent high peak currents
0.96
V ms
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, Circuit of Figure 1, VAVDD = VSUP = +13V, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER NEGATIVE CHARGE-PUMP REGULATOR VSUP Input Supply Range FBN Regulation Voltage (VREF - VFBN) FBN Input Bias Current FBN Line Regulation Error DRVN PCH On-Resistance DRVN NCH On-Resistance Negative Charge-Pump Soft-Start Period CONDITIONS MIN 6 -2% -50 TYP MAX 18 +2% +50 0.2 6 3 5 UNITS V V nA %/V
VREF - VFBN = 1V VFBN = 0, TA = +25C VSUP = 9V to 18V, VGOFF = -7V
1
7-bit voltage ramp with filtering to prevent high peak currents
ms
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES CTL Input Low Voltage CTL Input High Voltage CTL Input Current VCTL = 0 or VVCC, TA = +25C SRC Input Voltage Range SRC-to-COM Switch On-Resistance VDEL = 1.5V, CTL = VCC DRN-to-COM Switch On-Resistance VDEL = 1.5V, CTL = AGND COM-to-GND Pulldown VDEL = 0 VDEL = 1.5V, CTL = VCC SRC Input Current VDEL = 1.5V, CTL = AGND OPERATIONAL AMPLIFIERS SUP Supply Range VSUP Undervoltage Threshold SUP Supply Current Buffer configuration, VPOS = VSUP/2, no load Input Offset Voltage VNEG, V POS = V SUP/2, TA = +25C Input Bias Current VNEG, V POS = V SUP/2, TA = +25C Input Common-Mode Voltage Range Output-Voltage-Swing High Output-Voltage-Swing Low Short-Circuit Current XAO CONTROL RSTIN Threshold RSTIN Input Current RST Output Voltage RST Blanking Time XAO UVLO IOUT = 50mA I OUT = -50mA Sourcing Sinking Falling edge TA = +25C I SINK = 1mA Counting from VVCC crossing 2.25V VCC rising with typical hysteresis of 50mV
0.6 2 -1 +1 36 10 60 2.5 600 360 18 4.2 6.5 8 +1 VSUP
V V A V
1.5
k A A V V mA mV A V mV
6 3.8
4
-1 0 VSUP 350
350 500 500 1.22 -1 160 1.28 +1 0.4 280 1.7
mV mA
V A V ms V
Note 1: -40C specifcations are guaranteed by design, not production tested.
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
STEP-UP REGULATOR EFFICIENCY vs. LOAD CURRENT
MAX17075 toc01
MAX17075
STEP-UP REGULATOR OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17075 toc02
STEP-UP REGULATOR LINE REGULATION UNDER DIFFERENT LOADS
0.15 OUTPUT ERROR (%) 0.10 0.05 0 -0.05 -0.10 100mA LOAD -0.15 -0.20 NO LOAD 200mA LOAD 300mA LOAD
MAX17075 toc03
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 10 100 VIN = 3.3V VIN = 2.5V VIN = 5V
0.6 0.4 OUTPUT ERROR (%) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0
0.20
1000
0 100 200 300 400 500 600 700 800 900 1000 LOAD CURRENT (mA)
2.5
3.0
3.5
4.0
4.5
5.0
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
STEP-UP REGULATOR SWITCHING FREQUENCY vs. INPUT VOLTAGE
150mA LOAD 1.23 SWITCHING FREQUENCY (MHz) 1.22 1.21 1.20 1.19 1.18 1.17 1.16 2.5 3.0 3.5 4.0 4.5 5.0 0A 0V 0V
MAX17075 toc04
STEP-UP REGULATOR STARTUP WITH HEAVY LOAD (600mA)
MAX17075 toc05
1.24
0V
VIN 5V/div VAVDD 5V/div
IL 1A/div LX 10V/div
2ms/div
INPUT VOLTAGE (V)
STEP-UP REGULATOR LOAD-TRANSIENT RESPONSE (100mA TO 800mA)
MAX17075 toc06
STEP-UP REGULATOR PULSED LOAD-TRANSIENT RESPONSE (80mA TO 2.08mA)
MAX17075 toc07
0V 0V VAVDD (AC-COUPLED) 500mV/div IL 2A/div 0A 0A RCOMP = 82k CCOMP1 = 220pF CCOMP2 = 18pF 40s/div LOAD CURRENT 500mA/div 0A
VAVDD (AC-COUPLED) 500mV/div
IL 2A/div
0A RCOMP = 82k CCOMP1 = 220pF CCOMP2 = 18pF 10s/div
LOAD CURRENT 1A/div
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
IN SUPPLY QUIESCENT CURRENT vs. IN SUPPLY VOLTAGE
3.5 SUPPLY CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 0V VIN : 5V/div REF : 1V/div AVDD : 10V/div VCOM : 5V/div 4ms/div SRC : 20V/div GOFF : 5V/div GON : 20V/div DEL : 2V/div NO SWITCHING 200mA LOAD
MAX17075 toc08
POWER-UP SEQUENCE OF ALL SUPPLY OUTPUTS
MAX17075 toc09
4.0
0V 0V 0V 0V 0V
VIN REF AVDD VCOM SRC
DEL GOFF GON
POSITIVE CHARGE-PUMP REGULATOR LINE REGULATION
MAX17075 toc10
POSITIVE CHARGE-PUMP REGULATOR LOAD REGULATION
VSRC
MAX17075 toc11
POSITIVE CHARGE-PUMP REGULATOR LOAD-TRANSIENT RESPONSE (10mA TO 100mA)
MAX17075 toc12
0.05 0 OUTPUT ERROR (%) -0.05 -0.10 -0.15 -0.20 -0.25 -0.30 11 12 13 14 15 16 17
0.4 0 OUTPUT ERROR (%) -0.4 -0.8 -1.2 -1.6 GON
0V
GON (AC-COUPLED) 200mV/div
LOAD CURRENT 50mA/div 0A
-2.0 18 0 10 20 30 40 50 60 70 80 4s/div SUPPLY VOLTAGE (V) LOAD CURRENT (mA)
NEGATIVE CHARGE-PUMP REGULATOR LINE REGULATION
MAX17075 toc13
NEGATIVE CHARGE-PUMP REGULATOR LOAD REGULATION
MAX17075 toc14
NEGATIVE CHARGE-PUMP REGULATOR LOAD-TRANSIENT RESPONSE (10mA TO 100mA)
MAX17075 toc15
0.2
0.2
OUTPUT ERROR (%)
OUTPUT ERROR (%)
0V 0 0A
GOFF (AC-COUPLED) 100mV/div
0
LOAD CURRENT 50mA/div
-0.2 10.5 11.5 12.5 13.5 14.5 15.5 16.5 17.5 SUPPLY VOLTAGE (V)
-0.2 0 20 40 60 80 100 120 4s/div LOAD CURRENT (mA)
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
OPERATION AMPLIFIER FREQUENCY RESPONSE
1 0 -1 GAIN (dB) -2 -3 -4 -5 -6 -7 -8 100 1k 10k 100k 2s/div 2s/div FREQUENCY (kHz) 0V VVCOM 5V/div IVCOM 50mV/div NO LOAD 0V 100pF LOAD
MAX17075 toc16
OPERATIONAL AMPLIFIER RAIL-TO-RAIL INPUT/OUPUT WAVEFORMS
MAX17075 toc17
OPERATIONAL AMPLIFIER LOAD-TRANSIENT RESPONSE
MAX17075 toc18
2
VPOS 5V/div 0V
VVCOM (AC-COUPLED) 200mV/div
0A
OPERATIONAL AMPLIFIER LARGE-SIGNAL STEP RESPONSE
MAX17075 toc19
OPERATIONAL AMPLIFIER SMALL-SIGNAL STEP RESPONSE
MAX17075 toc20
VPOS 5V/div 0V 0mV
VPOS (AC-COUPLED) 100mV/div
VVCOM 5V/div 0V 0mV
VVCOM (AC-COUPLED) 100mV/div
40s/div
40s/div
HIGH-VOLTAGE SWITCH CONTROL FUNCTION
MAX17075 toc21
SUP SUPPLY CURRENT vs. SUP SUPPLY VOLTAGE
3.95 SUPPLY CURRENT (mA) VGON 10V/div 3.90 3.85 3.80 3.75 3.70 3.65 3.60 3.55 3.50 NO SWITCHING
MAX17075 toc22
4.00
0V
0V
VCTL 5V/div
10s/div
6
8
10
12
14
16
18
SUPPLY VOLTAGE (V)
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 NAME POS NEG OUT BGND SUP DRVP DRVN CTL RST FBP Operational Amplifier Noninverting Input Operational Amplifier Inverting Input Operational Amplifier Output Analog Ground for Operational Amplifier and Charge Pump. Connect to AGND underneath the IC. Operational Amplifier and Charge-Pump Supply Input. Connect this pin to the output of the boost regulator (AVDD) and bypass to BGND with a minimum1F capacitor. Positive Charge-Pump Driver Output Negative Charge-Pump Driver Output High-Voltage Switch Control Input. When CTL is high, the switch between GON and SRC is on and the switch between GON and DRN is off. When CTL is low, the switch between GON and DRN is on and the switch between GON and SRC is off. CTL is inhibited by VCC UVLO and when DEL is less than 1.25V. Reset Output. RST is an open-drain output. Positive Charge-Pump Regulator Feedback Input. Connect FBP to the center of a resistive voltagedivider between the positive charge-pump regulator output and AGND to set the positive charge-pump regulator output voltage. Place the resistive voltage-divider within 5mm of FBP. Negative Charge-Pump Regulator Feedback Input. Connect FBN to the center of a resistive voltagedivider between the negative output and REF to set the negative charge-pump regulator output voltage. Place the resistive voltage-divider within 5mm of FBN. Reference Output. Connect a 0.22F capacitor from REF to AGND. All power outputs are disabled until REF exceeds its UVLO threshold. Supplies the Internal Reference and Other Internal Circuitry. Connect VCC to the input supply voltage and bypass VCC to AGND with a minimum 1F ceramic capacitor. Analog Ground for Step-Up Regulator and Linear Regulators. Connect to power ground (PGND) underneath the IC. Reset Input. Connect to the center of a resistor-divider from VIN. Compensation Pin for Error Amplifier. Connect a series RC from COMP to AGND. Step-Up Regulator Feedback Input. Connect FB to the center of a resistive voltage-divider between the step-up regulator output and AGND to set the regulator's output voltage. Place the resistive voltagedivider within 5mm of FB. Power Ground Step-Up Regulator Switching Node. Connect inductor and catch diode here and minimize trace area for lowest EMI power ground. Switch Input. Drain of the internal high-voltage back-to-back p-channel FET connects to COM. Internal High-Voltage MOSFET Switch Common Terminal Switch Input. Source of the internal high-voltage pFET. Bypass SRC to PGND with a minimum 0.1F capacitor close to the pin. High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to set delay. Exposed Pad. Connect to AGND. FUNCTION
11
FBN
12 13 14 15 16 17 18, 19 20 21 22 23 24 --
REF VCC AGND RSTIN COMP FB PGND LX DRN COM SRC DEL EP
10
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
VIN 2.5V TO 5.5V (4.5 TO 5.5V FOR FULL LOAD) R1 10 VCC
L1 3.0H C1 10F 6.3V C2 10F 6.3V
D1 C3 10F 25V R8 187k C4 10F 25V
VAVDD 13V/500mA
C5 1F TO VCOM VAVDD R3 100k
LX PGND FB
OUT NEG
MAX17075
COMP
R10 100k C12 220pF
R9 20k
FROM SYSTEM 3.3V VIN R13 10k R11
POS REF R6 13.7k C9 0.22F AGND
RST RSTIN DRN COM SRC
R14 1k VAVDD VGON 30V/20mA C14 1F C15 0.1F D2
R12 20k
C13 0.01F
VAVDD C16 1F
FBN R7 100k VGOFF -7V/20mA DRVP D4 C11 0.1F DRVN D3 BGND SUP EP C6 1F FROM TCON CTL FBP DEL C8 0.033F R16 20k R15 464k C17 0.1F
C10 1F
VAVDD
Figure 1. Typical Operating Circuit
Typical Operating Circuit
The typical operating circuit (Figure 1) of the MAX17075 is a complete power-supply system for TFT LCD panels in monitors and TVs. The circuit generates
a +13V source driver supply, a +30V positive gate-driver supply, and a -7V negative gate-driver supply from a +2.5V to +5.5V input supply. Table 1 lists some selected components, and Table 2 lists the contact information for component suppliers.
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11
Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
VVCC
SUP POS NEG OUT BGND SRC BOOST CONTROLLER
LX
VAVDD
PGND FB COMP
DEL VGON COM SWITCH CONTROL OSC SEQUENCE VVCC
MAX17075
CTL RSTIN RST
FROM TCON
DRN VVCC VCC REF REF
VAVDD AGND FBN NEGATIVE CHARGE PUMP VGOFF DRVN SUP POSITIVE CHARGE PUMP DRVP
POUT FBP
VAVDD
Figure 2. Functional Diagram
Detailed Description
The MAX17075 contains a step-up switching regulator to generate the source driver supply, and two chargepump regulators to generate the gate-driver supplies. Each regulator features adjustable output voltage, digital soft-start, and timer-delayed fault protection. The step-up regulator uses fixed-frequency current-mode control architecture. The MAX17075 also includes one
high-performance operational amplifier designed to drive the LCD backplane (VCOM). The amplifier features high output current, fast slew rate (45V/s), wide bandwidth (20MHz), and rail-to-rail outputs. In addition, the MAX17075 features a high-voltage switch-control block, a 1.25V reference output, well-defined power-up and power-down sequences, and thermal-overload protection. Figure 2 shows the MAX17075 functional block diagram.
12
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
Table 1. Component List
DESIGNATION DESCRIPTION 10F 20%, 6.3V X5R ceramic capacitors (0603) Murata GRM188R60J106M TDK C1608X5R0J106M 10F 20%, 25V X5R ceramic capacitors (1206) Murata GRM31CR61E106M TDK C3216X5R1E106M 1F 10%, 50V X7R ceramic capacitors (1206) Murata GRM31MR71H105KA TDK C3216X7R1H105K DESIGNATION C11, C15, C16, C17 DESCRIPTION 0.1F 10%, 50V X7R ceramic capacitors (0603) Murata GRM188R71H104K TDK C1608X7R1H104K 3A, 30V Schottky diode (M-Flat) Toshiba CMS02 (TE12L,Q) (Top mark S2) 220mA, 100V dual diodes (SOT23) Fairchild MMBD4148SE (Top mark D4) 3.0H, 3ADC inductor Sumida CDRH6D28-3R0
C1, C2
D1 D2, D3, D4 L1
C3, C4, C7
C10, C14
Table 2. Component Suppliers
SUPPLIER Fairchild Semiconductor Sumida TDK Toshiba PHONE 408-822-2000 847-545-6700 847-803-6100 949-455-2000 FAX 408-822-2102 847-545-6720 847-390-4405 949-859-3963 WEBSITE www.fairchildsemi.com www.sumida.com www.component.tdk.com www.toshiba.com/taec
Main Step-Up Regulator
The main step-up regulator employs a current-mode, fixed-frequency PWM architecture to maximize loop bandwidth and provide fast-transient response to pulsed loads that are typical for TFT LCD panel source drivers. The 1.2MHz switching frequency allows the use of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel design. The integrated high-efficiency MOSFET and the built-in digital soft-start function reduce the number of external components required while controlling inrush currents. The output voltage can be set from VIN to 18V with an external resistive voltage-divider. The regulator controls the output voltage and the power delivered to the output by modulating the duty cycle (D) of the internal power MOSFET in each switching cycle. The duty cycle of the MOSFET is approximated by: V - VIN D AVDD VAVDD where VAVDD is the output voltage of the step-up regulator. Figure 3 shows the functional diagram of the step-up regulator. An error amplifier compares the signal at FB to 1.25V and changes the COMP output. The voltage at COMP sets the peak inductor current. As the load varies, the error amplifier sources or sinks current to the COMP output accordingly to produce the inductor peak
CLOCK LOGIC AND DRIVER PGND CURRENT-LIMIT COMPARATOR LX
SOFTSTART SLOPE COMP PWM COMPARATOR
ILIMIT
OSCILLATOR
CURRENT SENSE
ERROR AMP TO FAULT LOGIC FAULT COMPARATOR 1.0V 1.25V COMP FB
MAX17075
Figure 3. Step-Up Regulator Functional Diagram
current necessary to service the load. To maintain stability at high duty cycles, a slope-compensation signal is summed with the current-sense signal.
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
On the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel MOSFET and applying the input voltage across the inductor. The current through the inductor ramps up linearly, storing energy in its magnetic field. Once the sum of the current-feedback signal and the slope compensation exceed the COMP voltage, the controller resets the flip-flop and turns off the MOSFET. Since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (D1). The voltage across the inductor then becomes the difference between the output voltage and the input voltage. This discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. The MOSFET remains off for the rest of the clock cycle. The error amplifier compares the feedback signal (FBP) with a 1.25V internal reference. If the feedback signal is below the reference, the charge-pump regulator turns on P1 and turns off N1 when the rising edge of the oscillator clock arrives, level shifting C15 and C17 by VSUP volts. If the voltage across CPOUT plus a diode drop (VPOUT + VDIODE) is smaller than the level-shifted flying capacitor voltage (VC17 + VSUP), charge flows from C17 to CPOUT until diode D3-1 turns off. Similarly, if the voltage across C16 plus a diode drop (VC16 + VDIODE) is smaller than the level-shifted flying capacitor voltage (VC15 + VSUP), charge flows from C15 to C16 until diode D2-1 turns off. The falling edge of the oscillator clock turns off P1 and turns on N1, allowing VSUP to charge up the flying capacitor C15 through D2-2 and C16 to charge C17 through diode D3-2. If the feedback signal is above the reference when the rising edge of the oscillator comes, the regulator ignores this clock edge and keeps N1 on and P1 off. The MAX17075 also monitors the FBP voltage for undervoltage conditions. If the VFBP is continuously below 80% of the nominal regulation voltage for approximately 50ms, the MAX17075 sets a fault latch, shutting down all outputs except REF. Once the fault condition is removed, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device.
MAX17075
Positive Charge-Pump Regulator
The positive charge-pump regulator is typically used to generate the positive supply rail for the TFT LCD gatedriver ICs. The output voltage is set with an external resistive voltage-divider from its output to GND with the midpoint connected to FBP. The number of chargepump stages and the setting of the feedback divider determine the output voltage of the positive chargepump regulator. The charge pump includes a high-side p-channel MOSFET (P1) and a low-side n-channel MOSFET (N1) to control the power transfer as shown in Figure 4.
INPUT SUPPLY SUP
MAX17075
OSC P1
C6 D2-2 C15 D2-1 C17 D3-2 D3-1 POUT C14 C16
REF 1.25V
ERROR AMPLIFIER
DRVP
N1
POSITIVE CHARGE-PUMP REGULATOR
FBP
Figure 4. Positive Charge-Pump Regulator Block Diagram
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
Negative Charge-Pump Regulator
The negative charge-pump regulator is typically used to generate the negative supply rail for the TFT LCD gate driver ICs. The output voltage is set with an external resistive voltage-divider from its output to REF with the midpoint connected to FBN. The number of chargepump stages and the setting of the feedback divider determine the output of the negative charge-pump regulator. The charge-pump controller includes a high-side pchannel MOSFET (P2) and a low-side n-channel MOSFET (N2) to control the power transfer as shown in Figure 5. The error amplifier compares the feedback signal (FBN) with a 250mV internal reference. If the feedback signal is above the reference, the charge-pump regulator turns on N2 and turns off P2 when the rising edge of the oscillator clock arrives, level shifting C11. This connects C11 in parallel with reservoir capacitor C10. If the voltage across C10 minus a diode drop (VC10 - VDIODE) is higher than the level-shifted flying capacitor voltage (-VC11), charge flows from C10 to C11 until diode D4-2 turns off. The falling edge of the oscillator clock turns off N2 and turns on P2, allowing VSUP to charge up flying capacitor C11 through diode D4-1. If the feedback signal is below the reference when the rising edge of the oscillator comes, the regulator ignores this clock edge and keeps P2 on and N2 off. The MAX17075 also monitors the FBN voltage for undervoltage conditions. If the VFBN is continuously below 80% of the nominal regulation voltage (VREF VFBN) for approximately 50ms, the MAX17075 sets a fault latch, shutting down all outputs except REF. Once the fault condition is removed, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device.
MAX17075
Operational Amplifiers
The MAX17075 has one operational amplifier. The operational amplifier is typically used to drive the LCD backplane (VCOM) or the gamma-correction divider string. It features 500mA output short-circuit current, 45V/s slew rate, and 20MHz, 3dB bandwidth.
INPUT SUPPLY
MAX17075
SUP OSC
P2 DRVN C11 D4-1
REF 0.25V
ERROR AMPLIFIER
D4-2 GOFF N2 R7 C10
NEGATIVE CHARGE-PUMP REGULATOR
FBN
R6 REF
Figure 5. Negative Charge-Pump Regulator Block Diagram
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
Short-Circuit Current Limit and Input Clamp The operational amplifier limits short-circuit current to approximately 500mA if the output is directly shorted to SUP or to BGND. If the short-circuit condition persists, the junction temperature of the IC rises until it reaches the thermal-shutdown threshold (+160C typ). Once the junction temperature reaches the thermalshutdown threshold, an internal thermal sensor immediately sets the thermal fault latch, shutting off all the IC's outputs. The device remains inactive until the input voltage is cycled. The operational amplifier has 4V input clamp structures in series with a 500 resistance and a diode (Figure 6). Driving Pure Capacitive Load The operational amplifier is typically used to drive the LCD backplane (VCOM) or the gamma-correction divider string. The LCD backplane consists of a distributed series capacitance and resistance, a load that can be easily driven by the operational amplifier. However, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. As the operational amplifier's capacitive load increases, the amplifier's bandwidth decreases and gain peaking increases. A 5 to 50 small resistor placed between OUT and the capacitive load
MAX17075
reduces peaking, but also reduces the gain. An alternative method of reducing peaking is to place a series RC network (snubber) in parallel with the capacitive load. The RC network does not continuously load the output or reduce the gain. Typical values of the resistor are between 100 and 200, and the typical value of the capacitor is 10nF.
High-Voltage Switch Control
The MAX17075's high-voltage switch control block (Figure 7) consists of two high-voltage p-channel MOSFETs: Q1, between SRC and COM; and Q2, between COM and DRN. At power-up and only at power up, before the switch control is enabled (a 1.5k pulldown is present on COM). At switch-off, COM is high impedance. The switch control input (CTL) is not activated until all four of the following conditions are satisfied: the input voltage exceeds UVLO, the soft-start routine of all the regulators is complete, there is no fault condition detected, and VDEL exceeds its turn-on threshold. Once activated and if CTL is logic-high, Q1 turns on and Q2 turns off, connecting COM to SRC. When CTL is logic-low, Q1 turns off and Q2 turns on, connecting COM to DRN.
VCC 5A
MAX17075
SUP
DEL 2.25V Q3 FAULT REF_OK SRC
POS 4V
VREF
Q1
COM
500 NEG
MAX17075
SWITCH CONTROL Q2 1.5k
OUT
BGND
DRN CTL Q4
OP AMP INPUT CLAMP STRUCTURE
Figure 6. Op Amp Input Clamp Structure
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Figure 7. Switch Control
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
Reference Voltage (REF)
The reference voltage is nominally 1.25V, and can source at least 50A (see the Typical Operating Characteristics). VCC is the input of the internal reference block. Bypass REF with a 0.22F ceramic capacitor connected between REF and AGND. When the input voltage falls below the UVLO falling threshold, the controller turns off the main step-up regulator and disables the switch-control block; the operational amplifier output is high impedance.
MAX17075
Fault Protection
During steady-state operation, if the output of the main regulator or any of the linear-regulator outputs exceed their respective fault-detection thresholds, the MAX17075 activates an internal fault timer. If any condition or combination of conditions indicates a continuous fault for the fault-timer duration (50ms typ), the MAX17075 sets the fault latch to shut down all the outputs except the reference. Once the fault condition is removed, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device. The fault-detection circuit is disabled during the soft-start time.
VVCC
Power-Up Sequence and Soft-Start
Once the voltage on V CC exceeds the XAO UVLO threshold of approximately 1.5V, the reference turns on. With a 0.22F REF bypass capacitor, the reference reaches its regulation voltage of 1.25V in approximately 1ms. When the reference voltage exceeds 1V and VCC exceeds its UVLO threshold of approximately 2.25V, the IC enables the main step-up regulator, the gate-on linear-regulator controller, and the gate-off linearregulator controller simultaneously. The IC employs soft-start for each regulator to minimize inrush current and voltage overshoot and to ensure a well-defined startup behavior. Each output uses a 7-bit soft-start DAC. For the step-up and the gate-on linear regulator, the DAC output is stepped in 128 steps from zero up to the reference voltage. For the gate-off linear regulator, the DAC output steps from the reference down to 250mV in 128 steps. The soft-start duration is 10ms (typ) for step-up regulator and 3ms (typ) for gateon and gate-off regulators. A capacitor (CDEL) from DEL to AGND determines the switch-control-block startup delay. After the input voltage exceeds the UVLO threshold (2.25V typ) and the soft-start routine for each regulator is complete and there is no fault detected, a 5mA current source starts charging CDEL. Once the capacitor voltage exceeds 1.25V (typ), the switch-control block is enabled as shown in Figure 8. After the switch-control block is enabled, COM can be connected to SRC or DRN through the internal p-channel switches, depending upon the state of CTL. Before startup and when VIN is less than UVLO, DEL is internally connected to AGND to discharge CDEL. Select CDEL to set the delay time using the following equation: CDEL = DELAY _ TIME x 5A 1.25V
2.25V 1.5V
1V
VREF
VAVDD
14ms
SOFT-START
VCOM
3ms
SOFT-START VPOUT
1.25V
VGOFF VDEL
Undervoltage Lockout (UVLO)
The UVLO circuit compares the input voltage at VCC with the UVLO threshold (2.25V rising, 2.20V falling, typ) to ensure the input voltage is high enough for reliable operation. The 50mV (typ) hysteresis prevents supply transients from causing a restart. Once the input voltage exceeds the UVLO rising threshold, startup begins.
SOFT-START BEGINS VGON
INPUT VOLTAGE OK
SWITCH CONTROL ENABLED
Figure 8. Power-Up Sequence
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
Thermal-Overload Protection
Thermal-overload protection prevents excessive power dissipation from overheating the MAX17075. When the junction temperature exceeds +160C, a thermal sensor immediately activates the fault protection, which shuts down all outputs except the reference, allowing the device to cool down. Once the device cools down by approximately 15C, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device. The thermal-overload protection protects the controller in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of +150C. peak current. Finding the best inductor involves choosing the best compromise between circuit efficiency, inductor size, and cost. The equations used here include a constant LIR, which is the ratio of the inductor peak-to-peak ripple current to the average DC inductor current at the full load current. The best trade-off between inductor size and circuit efficiency for step-up regulators generally has an LIR between 0.3 and 0.6. However, depending on the AC characteristics of the inductor core material and ratio of inductor resistance to other power-path resistances, the best LIR can shift up or down. If the inductor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. If the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin high-resistance inductors are used, as is common for LCD-panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficiency improvements in typical operating regions. Calculate the approximate inductor value using the typical input voltage (VIN), the maximum output current (IMAIN(MAX)), and the expected efficiency (TYP) taken from an appropriate curve in the Typical Operating Characteristics section, and an estimate of LIR based on the above discussion:
2 VIN VAVDD - VIN TYP L AVDD = VAVDD IAVDD(MAX) x fSW LIR
XAO Voltage Detector
Based upon the input at the RSTIN and VCC pins, the XAO controller either pulls the reset pin RST low or sets it to high impedance. RST is an open-drain output. Pull it high to system 3.3V through a 10k resistor. Connect RSTIN to VIN through resistor-dividers R11 and R12 (Figure 1) to set the proper XAO threshold. Once VCC voltage exceeds approximately 2.25V, the controller initiates a 220ms blanking period during which the drop on VCC is ignored and RST is set to high impedance. After this blanking period and if RSTIN goes below approximately 1.25V, RST is pulled low indicating low RSTIN input. RST stays low until VCC falls below approximately 1V. Then RST cannot be held low any more. The controller gives up and RST is pulled up by the external resister. A 50mV hysteresis is implemented for XAO threshold.
Design Procedure
Step-Up Regulator
Inductor Selection The minimum inductance value, peak current rating, and series resistance are factors to consider when selecting the inductor. These factors influence the converter's efficiency, maximum output load capability, transient-response time, and output voltage ripple. Size and cost are also important factors to consider. The maximum output current, input voltage, output voltage, and switching frequency determine the inductor value. Very high inductance values minimize the current ripple, and therefore reduce the peak current, which decreases core losses in the inductor and conduction losses in the entire power path. However, large inductor values also require more energy storage and more turns of wire, which increase size and can increase conduction losses in the inductor. Low inductance values decrease the size, but increase the current ripple and
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Choose an available inductor value from an appropriate inductor family. Calculate the maximum DC input current at the minimum input voltage (VIN(MIN)) using conservation of energy and the expected efficiency at that operating point (MIN) taken from the appropriate curve in the Typical Operating Characteristics: IIN(DC,MAX) = IAVDD(MAX) x VAVDD VIN(MIN) x MIN
Calculate the ripple current at that operating point and the peak current required for the inductor: IAVDD _ RIPPLE = VIN(MIN) x VAVDD - VIN(MIN) L AVDD x VAVDD x fSW IAVDD _ RIPPLE 2
(
)
IAVDD _ PEAK = IIN(DC,MAX) +
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
The inductor's saturation current rating and the MAX17075's LX current limit should exceed IAVDD_PEAK, and the inductor's DC current rating should exceed IIN(DC,MAX). For good efficiency, choose an inductor with less than 0.1 series resistance. Considering the typical operating circuit, the maximum load current (IAVDD(MAX)) is 500mA with a 13V output and a typical input voltage of 5V. Choosing an LIR of 0.5 and estimating efficiency of 85% at this operating point: 8 5V 13V - 5V 0.85 3.35H L AVDD = 13V 0.5A x 1.2MHz 0.5 Using the circuit's minimum input voltage (2.5V) and estimating efficiency of 80% at that operating point: IIN(DC,MAX) = 0.5A x 13V 3.25A 2.5V x 0.8
2
Input-Capacitor Selection The input capacitor (CIN) reduces the current peaks drawn from the input supply and reduces noise injection into the IC. Two 10F ceramic capacitors are used in the typical operating circuit (Figure 1) because of the high source impedance seen in typical lab setups. Actual applications usually have much lower source impedance since the step-up regulator often runs directly from the output of another regulated supply. Typically, CIN can be reduced below the values used in the typical operating circuit. Ensure a low-noise supply at VCC by using adequate CIN. Alternately, greater voltage variation can be tolerated on CIN if VCC is decoupled from CIN using an RC lowpass filter (see R1 and C5 in Figure 1). Rectifier Diode The MAX17075's high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. In general, a 2A Schottky diode complements the internal MOSFET well. Output Voltage Selection The output voltage of the step-up regulator can be adjusted by connecting a resistive voltage-divider from the output (VAVDD) to ground with the center tap connected to FB (see Figure 1). Select R9 in the 10k to 50k range. Calculate R8 with the following equation:
V R8 = R9 x AVDD - 1 VFB where VFB, the step-up regulator's feedback set point, is 1.25V. Place R8 and R9 close to the IC.
MAX17075
The ripple current and the peak current are: IRIPPLE = 2.5V x (13V - 2.5V ) 0.51A 3.3H x 13V x 1.2MHz 0.51A 3.51A 2
IPEAK = 3.25A +
Output Capacitor Selection The total output voltage ripple has two components: the capacitive ripple caused by the charging and discharging of the output capacitance, and the ohmic ripple due to the capacitor's equivalent series resistance (ESR):
VAVDD _ RIPPLE = VAVDD _ RIPPLE(C) + VAVDD _ RIPPLE(ESR) V I - VIN VAVDD _ RIPPLE(C) AVDD AVDD , CAVDD VAVDDfSW and VAVDD _ RIPPLE(ESR) IPEAKRESR _ AVDD where I PEAK is the peak inductor current (see the Inductor Selection section). For ceramic capacitors, the output voltage ripple is typically dominated by VAVDD_RIPPLE(C). The voltage rating and temperature characteristics of the output capacitor must also be considered.
Loop Compensation Choose RCOMP (R10 in Figure 1) to set the high-frequency integrator gain for fast-transient response. Choose CCOMP (C12 in Figure 1) to set the integrator zero to maintain loop stability. For low-ESR output capacitors, use the following equations to obtain stable performance and good transient response:
RCOMP 312.5 x VIN x VAVDD x CAVDD L AVDD x IAVDD(MAX) VAVDD x CAVDD 10 x IAVDD(MAX)RCOMP
CCOMP
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19
Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
To further optimize transient response, vary RCOMP in 20% steps and CCOMP in 50% steps while observing transient-response waveforms.
Charge-Pump Regulators
Selecting the Number of Charge-Pump Stages For highest efficiency, always choose the lowest number of charge-pump stages that meet the output requirement. The number of positive charge-pump stages is given by:
+ VDROPOUT - VAVDD V POS = GON VSUP - 2 x VD where nPOS is the number of positive charge-pump stages, VGON is the output of the positive charge-pump regulator, VSUP is the supply voltage of the chargepump regulators, VD is the forward voltage drop of the charge-pump diode, and V DROPOUT is the dropout margin for the regulator. Use VDROPOUT = 600mV. The number of negative charge-pump stages is given by: NEG = - VGOFF + VDROPOUT VSUP - 2 x VD
Charge-Pump Output Capacitor Increasing the output capacitance or decreasing the ESR reduces the output ripple voltage and the peak-topeak transient voltage. With ceramic capacitors, the output voltage ripple is dominated by the capacitance value. Use the following equation to approximate the required capacitor value:
COUT _ CP ILOAD _ CP 2fOSCVRIPPLE _ CP
where COUT_CP is the output capacitor of the charge pump, I LOAD _ CP is the load current of the charge pump, and VRIPPLE_CP is the peak-to-peak value of the output ripple, and fOSC is the switching frequency.
Output Voltage Selection Adjust the positive charge-pump regulator's output voltage by connecting a resistive voltage-divider from the REG P output to GND with the center tap connected to FBP (Figure 1). Select the lower resistor of divider R16 in the 10k to 30k range. Calculate the upper resistor R15 with the following equation:
V R15 = R16 x GON - 1 VFBP where VFBP = 1.25V (typical). Adjust the negative charge-pump regulator's output voltage by connecting a resistive voltage-divider from VGOFF to REF with the center tap connected to FBN (Figure 1). Select R6 in the 35k to 68k range. Calculate R7 with the following equation: V - VGOFF R7 = R6 x FBN VREF - VFBN where VFBN = 250mV, VREF = 1.25V. Note that REF can only source up to 50A, using a resistor less than 35k for R6 results in higher bias current than REF can supply.
where nNEG is the number of negative charge-pump stages and VGOFF is the output of the negative chargepump regulator. The above equations are derived based on the assumption that the first stage of the positive charge pump is connected to VAVDD and the first stage of the negative charge pump is connected to ground.
Flying Capacitors Increasing the flying capacitor CX (connected to DRVN and DRVP) value lowers the effective source impedance and increases the output current capability. Increasing the capacitance indefinitely has a negligible effect on output current capability because the internal switch resistance and the diode impedance place a lower limit on the source impedance. A 0.1F ceramic capacitor works well in most low-current applications. The flying capacitor's voltage rating must exceed the following:
VCX > n x VSUP where n is the stage number in which the flying capacitor appears.
Set the XAO Threshold Voltage
XAO threshold voltage can be adjusted by connecting a resistive voltage-divider from input VIN to GND with the center tap connected to RSTIN (see Figure 1). Select R12 in the 10k to 50k range. Calculate R11 with the following equation: V R11 = R12 x INXAO - 1 VRSTIN where VRSTIN, the RSTIN threshold set point, is 1.25V. VINXAO is the desired XAO threshold voltage. Place R11 and R12 close to the IC.
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Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp
PCB Layout and Grounding
Careful PCB layout is important for proper operation. Use the following guidelines for good PCB layout: * Minimize the area of high-current loops by placing the inductor, the output diode, and the output capacitors near the input capacitors and near the LX and PGND pins. The high-current input loop goes from the positive terminal of the input capacitor to the inductor, to the IC's LX pin, out of PGND, and to the input capacitor's negative terminal. The high-current output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (D1), and to the positive terminal of the output capacitors, reconnecting between the output capacitor and input capacitor ground terminals. Connect these loop components with short, wide connections. Avoid using vias in the high-current paths. If vias are unavoidable, use many vias in parallel to reduce resistance and inductance. Create a power-ground island (PGND) consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all these together with short, wide traces or a small ground plane. Maximizing the width of the power ground traces improves efficiency and reduces output voltage ripple and noise spikes. Create an analog ground plane (AGND) consisting of the AGND pin, all the feedback-divider ground connections, the operational amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device's exposed backside paddle. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside paddle. Make no other connections between these separate ground planes. * Place all feedback voltage-divider resistors within 5mm of their respective feedback pins. The divider's center trace should be kept short. Placing the resistors far away causes their FB traces to become antennas that can pick up switching noise. Take care to avoid running any feedback trace near LX or the switching nodes in the charge pumps, or provide a ground shield. Place the VCC pin and REF pin bypass capacitors as close as possible to the device. The ground connection of the VCC bypass capacitor should be connected directly to the AGND pin with a wide trace. Minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. Minimize the size of the LX node while keeping it wide and short. Keep the LX node away from feedback nodes (FB, FBP, and FBN) and analog ground. Use DC traces to shield if necessary.
MAX17075
*
*
*
*
*
Refer to the MAX17075 evaluation kit for an example of proper PCB layout.
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21
Boost Regulator with Integrated Charge Pumps, Switch Control, and High-Current Op Amp MAX17075
Pin Configuration
PROCESS: S45UR
RSTIN PGND AGND VCC
Chip Information
TOP VIEW
COMP 16
FB
18 PGND 19 LX 20 DRN 21 COM 22 SRC 23 DEL 24 1 POS
17
15
14
13 12 11 10 REF FBN FBP RST CTL DRVN
Package Information
For the latest package outline information, go to www.maxim-ic.com/packages. PACKAGE TYPE 24 TQFN PACKAGE CODE T2444-4 DOCUMENT NO. 21-0139
MAX17075
9 8 7
2 NEG
3 OUT
4 BGND
5 SUP
6 DRVP
THIN QFN
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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